Custom Code/PowerPC Assembly Cheatsheet

// WIP

# = placeholder

r# = register

i# = immediate (the subscript numbers next to it is it's size in bits)

ui# = unsigned immediate (above is signed)

* = unsure of functionality

resources:

• https://jimkatz.github.io/powerpc_for_dummies (very incomplete, has mistakes)
• http://wiibrew.org/wiki/Assembler_Tutorial#Load_and_Store_Instructions (also has missing instructions but way more accurate and better worded)
• http://math-atlas.sourceforge.net/devel/assembly/ppc_isa.pdf (official instruction set docs, hard to navigate/search)

Instruction	Name	Parameters	Pseudocode Equivalent	Additional Info
li	Load Immediate	rA, iX₁₆	rA = iX	Loads iX into rA
lis	Load Immediate Shifted	rA, iX₁₆	rA = rA | (iX << 16)	Loads iX into the upper 16 bits of rA
lwz	Load Word Zero	rA, iX₁₆(rB)	rA = *(rB + iX)	Loads the value at the address (rB + iX) into rA
lwzu	Load Word Zero Update	rA, iX₁₆(rB)	rA = *(rB + iX) rB = rB + iX	Loads the value at the address (rB + iX) into rA Then loads rB with the address (rB + iX)
lwzx	Load Word Zero Indexed	rA, rB, rC	rA = *(rB + rC)	Loads the value at the address (rB + rC) into rA
lmw *	Load Multiple Words	rA, iX₁₆(rB)	int EA = rB + iX; int N = rA; do { GPR[N] = *(EA); EA = EA + 4; N = N + 1; } while (N <= 31);	Loads GPR[rA] to r31 with the value at the address (rB + iX + N), where N starts at 0 and increments by 4 for each register loaded. Example: (r0 = 29, r1 = 0x20000000) lmw r0, 0x20(r1) This will load the following registers like so: r29 = *(0x20000020) r30 = *(0x20000024) r31 = *(0x20000028)
add	Addition	rA, rB, rC	rA = rB + rC
addi	Add Immediate	rA, rB, iX₁₆	rA = rB + iX
addis	Add Immediate Shifted	rA, rB, iX₁₆	rA = rB + (iX << 16)
and	AND Operation	rA, rB, rC	rA = rB & rC
andc	AND Complement	rA, rB, rC	rA = rB & ~rC
andi.	AND Immediate	rA, rB, uiX₁₆	rA = rB & uiX
andis.	AND Immediate Shifted	rA, rB, uiX₁₆	rA = rB & (uiX << 16)
b	Branch
bl	Branch And Link
blr	Branch To Link Register
beq	Branch If Equal
bne	Branch If Not Equal
bgt	Branch If Greater Than
blt	Branch If Less Than
ble	Branch If Less Than Or Equal To
bge	Branch If Greater Than Or Equal To
bng	Branch If Not Greater Than
bnl	Branch If Not Less Than
bso	Branch If Summary Overflow
bns	Branch If Not Summary Overflow
bun	Branch If Unordered
bnu	Branch If Not Unordered
bctr	Branch To Count Register
bctrl	Branch To Count Register And Link
bdnz	Branch If Decremented Count Register Not Zero
bdnzt	Branch If Decremented Count Register Not Zero And If Condition True
bdnzf	Branch If Decremented Count Register Not Zero And If Condition False
bdz	Branch if Decremented Count Register Zero
cmp	Compare
cmpwi	Compare Word Immediate
cmplwi	Compare Logical Word Immediate
cntlzw	Count Leading Zeros Word
eieio	Enforce In-Order Execution of I/O
eqv	Equivalent	rA, rB, rC	rA = rB == rC
extsb	Extend Sign Byte	rA, rB	rA = (int8_t)rB
extsh	Extend Sign Halfword	rA, rB	rA = (int16_t)rB
extsw	Extend Sign Word	rA, rB	rA = (int32_t)rB
mr	Move Register	rA, rB	rA = rB
mflr	Move From Link Register
mtlr	Move To Link Register
mtctr	Move To Count Register
mtspr	Move To Special Purpose Register
mulli	Multiply Low Immediate
nand	NAND Operation	rA, rB, rC	rA = ~(rB & rC)
neg	Negate	rA, rB	rA = ~rB + 1
nor	NOR Operation	rA, rB, rC	rA = ~(rB | rC)
not	NOT Operation	rA, rB	rA = ~rB
or	OR Operation	rA, rB, rC	rA = rB | rC
orc	OR Complement	rA, rB, rC	rA = rB | ~rC
ori	OR Immediate	rA, rB, iX₁₆	rA = rB | iX
oris	OR Immediate Shifted	rA, rB, iX₁₆	rA = rB | (iX << 16)
rlwinm	Rotate Left Word Immediate Then AND With Mask
slw	Shift Left Word
slwi	Shift Left Word Immediate
sraw	Shift Right Algebraic Word
stwu	Store Word And Update
xor	XOR Operation	rA, rB, rC	rA = rB ^ rC
xori	XOR Immediate	rA, rB, iX₁₆	rA = rB ^ iX
xoris	XOR Immediate Shifted	rA, rB, iX₁₆	rA = rB ^ (iX << 16)